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<H1>LMSW -- Load Machine Status Word</H1>

<PRE>
Opcode      Instruction      Clocks   Description

0F  01 /6   LMSW r/m16       10/13    Load r/m16 in machine status word
</PRE>

<H2>Operation</H2>

<PRE>
MSW := r/m16; (* 16 bits is stored in the machine status word *)
</PRE>

<H2>Description</H2>

LMSW loads the machine status word (part of CR0) from the source
operand. This instruction can be used to switch to Protected Mode; if so,
it must be followed by an intrasegment jump to flush the instruction
queue. LMSW will not switch back to Real Address Mode.
<P>
LMSW is used only in operating system software. It is not used in
application programs.

<H2>Flags Affected</H2>

None

<H2>Protected Mode Exceptions</H2>

#GP(0) if the current privilege level is not 0; #GP(0) for an illegal
memory operand effective address in the CS, DS, ES, FS, or GS
segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code)
for a page fault

<H2>Real Address Mode Exceptions</H2>

Interrupt 13 if any part of the operand would lie outside of the effective
address space from 0 to 0FFFFH

<H2>Virtual 8086 Mode Exceptions</H2>

Same exceptions as in Real Address Mode; #PF(fault-code) for a page
fault

<H2>Notes</H2>

The operand-size attribute has no effect on this instruction. This
instruction is provided for compatibility with the 80286; 80386 programs
should use <A HREF="MOVRS.htm">MOV</A> CR0, ... instead.
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<B>up:</B> <A HREF="c17.htm">
Chapter 17 -- 80386 Instruction Set</A><BR>
<B>prev:</B><A HREF="LLDT.htm"> LLDT Load Local Descriptor Table Register</A><BR>
<B>next:</B><A HREF="LOCK.htm"> LOCK Assert LOCK# Signal Prefix</A>
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